1. Field of the Invention
The present invention relates to a high-frequency oscillator. More particularly, the invention relates to a high-frequency oscillator using Field-Effect Transistors (FETs) and electromagnetically-coupled transmission lines, which is applicable to the microwave or millimeter wave ranges.
2. Description of the Prior Art
In a high-frequency oscillator using an FET where the output of the FET is positively fedback to its input, generally, some phase error tends to occur between the input and output of the FET due to the 1/f noise and the white noise generated in the FET. The resonant or oscillation frequency of the oscillator shifts automatically so as to eliminate or decrease the phase error according to the Kirchhoff's law. Thus, the oscillation frequency tends to fluctuate, resulting in a wide-based spectrum B in FIG. 1.
Ideally, the oscillation frequency of the oscillator is kept at a single value and therefore, it has a linear spectrum A shown in FIG. 1, i.e., it is expressed by the well-known .delta. function.
The word "phase noise" is defined as the ratio (P.sub.F /P.sub.0) of the power level P.sub.F at the frequency apart from the central oscillation frequency by an offset (i.e., off-carrier) frequency .DELTA.f with respect to the power level P.sub.0 at the central oscillation frequency, which is expressed by the unit "dBc/Hz". It is preferred that the value of the phase noise is as small as possible. In other words, as the value of the phase noise becomes smaller, the capacity or performance of the oscillator becomes higher.
The fluctuation of the oscillation frequency, i.e., phase noise, varies dependent upon the 1/f noise and the load QL of the resonator. Thus, to reduce the phase noise, it is required to decrease the 1/f noise and to increase the load Q.sub.L.
The main cause of the 1/f noise is the time constant distribution of the recombination centers existing at the surfaces of the semiconductor of the FET and the interfaces therein. Therefore, not only the 1/f noise is difficult to be controlled but also it tends to affect the lateral-type semiconductor device such as the FET. To suppress the effect of the 1/f noise, a vertical-type semiconductor device such as a heterojunction bipolar transistor is often used instead of the FET. Alternately, a suitable measure to increase the load Q.sub.L is often taken.
Various high-frequency oscillators formed by the FET that operates in the microwave or millimeter-wave range have been developed and reported, an example of which is shown in FIG. 2. The prior-art oscillator of FIG. 2 is disclosed in the Japanese Non-Examined Patent Publication No. 9-260945 published in October 1997.
As shown in FIG. 2, this prior-art oscillator is equipped with a dielectric resonator 109 to decrease the phase noise. A bypass capacitor 100, an oscillation FET 101, a feedback stub 102, a varactor element 103, an oscillation circuit 104, an output matching circuit 105, an output circuit 106, capacitors 107 and 111, and a coupling line 108 are formed on a Gallium Arsenide (GaAs) substrate 112.
In the prior-art oscillator shown in FIG. 2, the load Q.sub.L is increased to reduce the phase noise by using the dielectric resonator 109 with a high Q value. For example, if the value of the load Q.sub.L is increased to ten times its original value, the phase noise is decreased to one-hundredth (1/100) (i.e., -20 dB). Thus, this oscillator has an advantage that the phase noise can be effectively decreased. However, it has a problem that the mass productivity is not high and that the oscillator size or scale is large.
Another example of the prior-art high-frequency oscillators of this sort is shown in FIG. 3, which is of the series feedback type and which has an advantage that both the mass productivity and the reproducibility are excellent.
As shown in FIG. 3, this prior-art oscillator comprises an FET 222. A transmission line 217, which serves to generate a negative resistance, is connected to the source of the FET 222. A transmission line 221 is connected to the drain of the FET 222. The line 221 is further connected to an output terminal 213 through a dc-blocking capacitor 223b. A transmission line 220 is connected to the gate of the FET 222 through a dc-blocking capacitor 223a. The line 220 is further connected to a transmission line 218 through a capacitor 219. The line 218 serves as an inductor determining the oscillation frequency. The capacitor 219 serves to determine the oscillation frequency along with the line 218.
A gate bias circuit or line 224 is connected to the gate of the FET 222. The circuit 224 comprises an inductor 224a and a voltage source 224b providing a bias voltage V.sub.g. A drain bias circuit or line 225 is connected to the connection point of the transmission line 221 and the capacitor 223b. The circuit 225 comprises an inductor 225a and a voltage source 225b providing a bias voltage V.sub.d.
To examine the performance of the prior-art oscillator shown in FIG. 3, the inventor carried out simulation using a known circuit simulator under the following condition, in which the 1/f noise was not considered.
On the assumption that the prior-art oscillator of FIG. 3 is formed on a GaAs substrate with a thickness of 40 .mu.m, the relative dielectric constant .epsilon.r was set as 12.6. The transmission line 217 was supposed to be a microstrip line with a width of 10 .mu.m and a length of 100 .mu.m. The transmission line 218 was supposed to be a microstrip line with a width of 10 .mu.m and a length of 900 .mu.m. The capacitance of the capacitor 219 determining the oscillation frequency was set as 100 fF. The transmission line 220 was supposed to be a microstrip line with a width of 300 .mu.m and a length of 270 .mu.m. The transmission line 221 was supposed to be a microstrip line with a width of 300 .mu.m and a length of 276 .mu.m. The capacitance of the dc-blocking capacitors 223 was set as 1 pF. The gate bias voltage V.sub.g was set as -0.5V. The drain bias voltage V.sub.d was set as 4.5V.
With respect to the FET 222, the FET 222 was supposed to be an FET having the AlGaAs/InGaAs heterojunction and the gate width Wg of 200 .mu.m. Then, a nonlinear FET model was obtained by using the "Curtice Cubic" model. Using the nonlinear FET model thus obtained, the output power of the oscillator was analyzed by the Harmonic Balance method while the nonlinear FET parameters as shown in FIG. 4 were used. In FIG. 4, Lg, Ls, Ld are the gate, source, and drain inductances, respectively, and Cpg and Cpd are the gate and drain parasitic capacitances, respectively. The analysis was carried out using the oscillator testing bench prepared for the microwave simulator produced by the HP EEsof Inc. and named "Series-IV Libra".
The simulation result thus obtained is shown in FIGS. 5 and 6. FIG. 5 shows the output power characteristic of the prior-art oscillator of FIG. 3, in which the output power is 14.2 dBm at the frequency of 99.3 GHz. In this case, the phase noise is given as shown in FIG. 6, in which the phase noise is -103.0 dBc/Hz at the offset frequency of 100 kHz.
The measured value of the phase noise of the prior-art oscillator of FIG. 3 was approximately -60 to -40 dBc/Hz at the highest at the offset frequency of 100 kHz from the oscillation frequency of 100 GHz, which is higher than that of the above-described simulation result. This is due to the fact that the 1/f noise was not considered in the simulation.
As a result, it is found that from the view point of usefulness, the phase noise of the prior-art oscillator of FIG. 3 is not satisfactorily low for the use in the high frequency range of 60 GHz or higher.
As explained above, the prior-art oscillator shown in FIG. 2 has the problem that the mass productivity is not high and the oscillator size or scale is large. The prior-art oscillator shown in FIG. 3 has the problem that the phase noise is high.